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How to Create Area Constraints for Kernel in Vitis Accelerated Design
How to Create Area Constraints for Kernel in Vitis Accelerated Design
This article is from Hong Han, senior product application engineer of XilinxThe platform on alveo series development board is actually a static part of DFX design. Alveo series development board is used in Vitis unified software platform to design accelerated kernels. Finally, the logic of these kernels will be distributed in the dynamic area of DFX design.This article will introduce how to make a floorplan (draw pblock) for the kernel logic and artificially control the layout of the kernel logic.Let's take the classic example design "vector addition" as an example:1. Open Vitis 2020.2 and create a new application projectFile -》 New -》 Application project2. Select Xilinx_ u200_ qdma_ 201910_ 1 Platform (the method discussed in this article is not limited to a specific platform)3. Select and open example design "vector addition"4. Set "- R2" for hardware flow in link phase, and then buildSelect - R2 for report level here: the VPL (Vitis platform link) process outputs more intermediate files. Later, we will use opt.dcp required to draw kernel pblock5. The VPL completes opt without waiting for the xclbin file to be generated_ After the design step, we can see XX_ Opt.dcp file.XX_ Directory and file name of opt. DCP:vitis_ pblock_ u200/vadd_ test_ system_ hw_ link/Hardware/binary_ container_ onepfm_ top_ wrapper_ opt.dcp6. Put this XX_ Copy opt.dcp to another directory and open the DCP file with vivado7. View the existing pblock. Main menu window - physical constraintsIn this view, you can see that the platform has set corresponding pblocks in each SLR for the dynamic area, and it should be noted that the existing pblocks in the design are hierarchicalFor example: pblock_ dynamic_ Region contains three subordinate pblocks:pblock_ dynamic_ SLR0,pblock_ dynamic_ SLR1,pblock_ dynamic_ SLR2,Reminder: the number of SLRs may be different on different platforms. It is normal that the names of pblock in different platforms are different. Users need to observe.The pblock generated for the kernel module should be pblock_ dynamic_ Slr0 is a sub module of pblock. The tool supports placing different parts of the same kernel into multiple SLRs. Users need to ensure the timing of cross SLR paths.8. Draw pblock for the kernel moduleHere, try to put the kernel in pblock_ dynamic_ The central area to which slr0 belongs《1》。 Select the kernel module in the netlist view of vivadoThe module name in the example is PFM_ top_ i/dynamic_ region/krnl_ vadd_ one《2》。 You can see in the cells properties window that the current pblock of this module is pblock_ dynamic_ region《3》。 Click the "draw pblock" button in the device view to the original pblock in the device view_ dynamic_ Draw a box within the range of slr0, and the area covered by the newly drawn pblock shall be completely included by the original pblock. After drawing, you can also select pblock to fine tune the boundary of pblock. At the same time, in order not to affect the structure of the original pblock, set the parent pblock of the new pblock to pblock with the following command in TCL console_ dynamic_ SLR0:set_ property PARENT pblock_ dynamic_ SLR0 [get_ pblocks pblock_ krnl_ vadd_ 1]《4》。 Look at the pblock attribute of the kernel module. It has changed to pblock_ krnl_ vadd_ one《5》 The corresponding constraints of pblock will be printed in TCL console. We can copy these constraints to a new TCL file and save them.(save it here to kernel_pblock. TCL)《6》 Take a look at the updated pblock structure and the newly generated pblock_ krnl_ vadd_ 1 is pblock_ dynamic_ Child pblock of slr0《7》 Continue to execute place on TCL console_ The design command completes the layoutTheoretically, this step can be skipped if you are sure that there is no problem with your pblock.《8》 Complete place_ After designing, you can observe the actual distribution of kernel resources on the deviceYou can see that all the kernel logic is distributed in the pblock area just drawn9. In the link phase of Vitis, make the following settings to make the previously saved command to draw pblock in the place of VPL (Vitis platform link)_ The design step takes effect before execution--vivado.prop run.impl_ 1.STEPS.PLACE_ DESIGN.TCL.PRE=XX/kernel_ pblock.tcl10. Rebuild the hardware flow of Vitis, and the previously added commands will take effect.Summary: This is a simple process of creating area constraints (pblocks) for kernel logic. Actual users can also create pblocks for sub modules of the kernel. There are no restrictions on tools in this regardEditing: JQ
Principles and Applications of Operational Amplifiers
Principles and applications of operational amplifiersKeywords: LM324, operational amplifier, operational amplifier, comparator, oscillatorIn this paper, the practical circuit design is carried out for the parameters of high-performance integrated four operational amplifier LM324, and the circuit principle is discussed. LM324 is a four operational amplifier integrated circuit. It is packaged in 14 pin dual in-line plastic. The outline is shown in the figure. It contains four groups of operational amplifiers with exactly the same form. Except that the power supply is shared, the four groups of operational amplifiers are independent of each other. Each group of operational amplifiers can be represented by the symbols shown in Figure 1. It has five lead out pins, of which "" and "-" are two signal input terminals, "V " and "V -" are positive and negative power supply terminals, and "VO" is output terminal. Among the two signal input terminals, VI - (-) is an inverse input terminal, indicating that the signal of the output terminal VO of the operational amplifier is opposite to the bit of the input terminal; VI () is an in-phase input terminal, indicating that the signal at the output terminal VO of the operational amplifier is the same phase as the input terminal. The pin arrangement of LM324 is shown in Figure 2. Because LM324 four op amp circuit has the advantages of wide power supply voltage range, low static power consumption, single power supply and low price, it is widely used in various circuits. The following describes its application examples. See the attached figure for the circuit of LM324 as inverted AC amplifier. The amplifier can replace the transistor for AC amplification, and can be used for amplifier preamplifier, etc. The circuit does not need debugging. The amplifier is powered by a single power supply, composed of R1 and R2, 1 / 2V bias, and C1 is the vibration elimination capacitor. The amplifier voltage amplification factor AV is only determined by the external resistors RI and RF: AV = - RF / ri. A negative sign indicates that the phase of the output signal is opposite to that of the input signal. According to the value given in the figure, AV = - 10. The input resistance of this circuit is ri. Generally, RI is equal to the internal resistance of the signal source, and then RF is selected according to the required magnification. CO and CI are coupling capacitances. LM324 is used as in-phase AC amplifier. See the attached figure. In phase AC amplifier is characterized by high input impedance. R1 and R2 form a 1 / 2V voltage dividing circuit, and the operational amplifier is biased by R3. The voltage amplification factor AV of the circuit is only determined by the external resistance: AV = 1 RF / R4, and the circuit input resistance is R3. The resistance of R4 ranges from thousands of ohms to tens of thousands of ohms. LM324 is used as AC signal three distribution amplifier. This circuit can divide the input AC signal into three outputs. The three signals can be used for indication, control, analysis, etc. It has little impact on the signal source. Because the input resistance of operational amplifier AI is high, the output terminal of operational amplifier A1-A4 is directly connected to the negative input terminal, and the signal is input to the positive input terminal, which is equivalent to RF = 0 in the in-phase amplification state. Therefore, the voltage amplification factor of each amplifier is 1, which has the same function as the emitter follower composed of discrete elements. R1 and R2 form a 1 / 2V bias. In static state, the voltage of A1 output terminal is 1 / 2V , so the output terminal of operational amplifier a2-a4 is also 1 / 2V , and the AC signal is taken out through the isolation effect of input and output capacitor to form three-way distributed output. LM324 is used as an active band-pass filter. Spectrum analyzers of many audio devices use this circuit as a band-pass filter to select signals of different frequency bands. On the display, the number of light-emitting diodes is used to indicate the signal amplitude. For the center frequency of this active band-pass filter, the voltage gain at the center frequency fo Ao = B3 / 2B1, quality factor, 3dB bandwidth B = 1/( п* R3 * c) can also calculate the parameter values of each element of the band-pass filter according to the Q, fo and AO values determined by the design. R1=Q/(2 п foAoC),R2=Q/((2Q2-Ao)*2 п foC),R3=2Q/(2 п foC)。 In the above formula, when fo = 1kHz, C is 0.01uF. This circuit can also be used for general frequency selective amplification. This circuit can also use a single power supply. Just bias the positive input of the operational amplifier at 1 / 2V and connect the lower end of the resistance R2 to the positive input of the operational amplifier. LM324 is used as temperature measurement circuit. See the attached figure. The temperature probe adopts a silicon triode 3DG6 and connects it into a diode. The temperature coefficient of the emitter junction voltage of silicon transistor is about - 2.5mv / ℃, that is, the emitter junction voltage will decrease by 2.5mv every time the temperature increases by 1 degree. Op amp A1 is connected in the form of in-phase DC amplification. The higher the temperature, the smaller the voltage drop of transistor BG1, the lower the voltage at the in-phase input end and the lower the voltage at the output end of op amp A1. This is a linear amplification process. When a measuring or processing circuit is connected to the A1 output terminal, the temperature can be indicated or other automatic control can be carried out. LM324 is used as a comparator. When the feedback resistance of the operational amplifier is removed, or when the feedback resistance tends to infinity (i.e. open-loop state), it is theoretically considered that the open-loop magnification of the operational amplifier is also infinity (actually very large, for example, the open-loop magnification of LM324 operational amplifier is 100dB, i.e. 100000 times). At this time, the operational amplifier forms a voltage comparator whose output is either high level (V ) or low level (V - or grounding). When the positive input voltage is higher than the negative input voltage, the operational amplifier outputs a low level. In the figure, two operational amplifiers are used to form a voltage upper and lower limit comparator, with resistors R1 and R1 ˊ A voltage dividing circuit is formed to set the comparison level U1 for the operational amplifier A1; Resistance R2, R2 ˊ A voltage dividing circuit is formed to set the comparison level U2 for the operational amplifier A2. The input voltage U1 is simultaneously added between the positive input terminal of A1 and the negative input terminal of A2. When UI > U1, the operational amplifier A1 outputs a high level; When UI < U2, when the input voltage UI exceeds the range of [U2, U1], the LED is on, which is a voltage double limit indicator. If U2 > U1 is selected, the LED lights up when the input voltage is in the range of [U2, U1], which is a "window" voltage indicator. This circuit is used with various sensors. With a little flexibility, it can be used for double limit detection of various physical quantities, short circuit, open circuit alarm, etc. LM324 shall be used as monostable trigger. See attached Fig. 1. This circuit can be used in some automatic control systems. Resistors R1 and R2 form a voltage dividing circuit to provide bias voltage U1 for the negative input of operational amplifier A1 as a comparison voltage reference. In static state, the capacitor C1 is charged, and the voltage U2 at the positive input terminal of operational amplifier A1 is equal to the power supply voltage V , so A1 outputs high level. When the input voltage UI becomes low, the diode D1 is turned on, and the capacitor C1 is discharged rapidly through D1, so that U2 suddenly drops to the ground level. At this time, because U1 > U2, the op amp A1 outputs low level. When the input voltage becomes high, the diode D1 is cut off and the power supply voltage R3 charges the capacitor C1. When the charging voltage on C1 is greater than U1, both U2 > U1 and A1 output become high level, thus ending a monostable trigger. Obviously, increasing U1 or R2 and C1 will increase the monostable delay time, and vice versa. If diode D1 is removed, this circuit has power on delay function. When just powered on, U1 > U2, the op amp A1 outputs a low level. With the continuous charging of capacitor C1, U2 increases. When U2 > U1, the A1 output changes to a high level. Refer to figure 2.
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